As for your claim,
  "If the amplifier stage worked as you
   suggested, this would probably be the
   most non-linear amp you could imagine."
It was never argued that the SRPP was a particularly linear push-pull amplifier. In fact, it is a poor push-pull amplifier in the sense that voltage signal developed across resistor Rak contains the harmonics generated by the bottom triode, which does not allow for their cancellation as would happen in a better designed PP amplifier.   
  As for your claim,

   "Why do this? Because if properly done, there is no way to achieve a more linear  response from a triode; the input impedance becomes very high, the output impedance very low, and the response of the stage very fast (hence their use in digital circuits)."

   Sorry, but the input impedance is at its highest when the plate is shorted to ground with a zero ohm load. Under the constant current conditions you just specified the gain is at its highest, thus the Miller effect capacitance is also at its highest; thus the input impedance is at its lowest. So too the output impedance is at its highest, as it equals rp (or if the cathode resistor is not bypassed, rp + [mu + 1]Rk) and any finite load impedance would serve to lower the output impedance as it would be in parallel with the rp of the triode. And last, the rise time is dependent upon capacitances and current. Therefore, as the capacitance is at its highest, the speed is at its lowest. If you do not believe this, test it yourself: try a constant current load versus a 1k resistor and measure the rise times. Digital circuits may use a variation of this topology because it is good enough and cheap, not because it is magical. By the way, transistors do not readily lend themselves to this topology as do triodes, pentode, FETs, and depletion mode MOSFETs, as transistors enhancement mode devices which greatly complicates their biasing. In fact, I am not sure that the digital topology you keep describing is even SRPP; where does the load attach? Please cite an example IC or provide a schematic.
   My guess is that digital circuits are confusing rather than enlightening you. Look at the SRPP in isolation of all the other circuits you have ever seen and start at the cathode of the bottom triode and work your way up to the plate of the top triode  drawing an equivalent circuit in terms of resistances and current generators. Or if you do not want to do your own homework, look carefully at the equivalent circuit drawn in at the site of the  aforesaid link.

"It is an active load (i.e. constant current) gain stage, and is the building block for almost all current op-amps and digital computer circuits. In an IC the transistors are doped and trimmed to obtain the beta needed to operate the circuit in its  most linear region. It is such an oversight to not see this circuit as an active load that I am almost embarrassed for the article you wrote."

   Embarrassment aside, the bottom triode is loaded by the top tubes interaction with the load. If the external load impedance is zero, then the bottom triode is only loaded by resistor, Rak. If the external load impedance is infinity, then the bottom triode is only loaded by rp + (mu + 1)Rak and now you have something resembling a constant current source. In other words, we have a quasi-current source just as long as we do not attach a load to the circuit. If the load is so high that it can be viewed as near infinite, then do not attach the load to the top triode's cathode, but the bottom triode's plate, instead. (Capacitances count; and this circuit has a hard time at driving reactive loads.) Sadly, the construction techniques used in the making of an IC is not illuminating in this case.
   As for your next claim that loading a triode with a constant current source is a wonderful thing, finally we agree on something up until you claim,